Class CIM_PCIController
extends CIM_Controller

PCIController is a superclass for the PCIBridge and PCIDevice classes. These classes model adapters and bridges on a PCI bus. The properties in PCIController and its subclasses are defined in the various PCI Specifications published by the PCI SIG.

Class Hierarchy

CIM_ManagedElement
   |
   +--CIM_ManagedSystemElement
   |
   +--CIM_LogicalElement
   |
   +--CIM_LogicalDevice
   |
   +--CIM_Controller
   |
   +--CIM_PCIController

Direct Known Subclasses

CIM_PCIDevice
CIM_PCIBridge

Class Qualifiers

NameData TypeValueScopeFlavors
DescriptionstringPCIController is a superclass for the PCIBridge and PCIDevice classes. These classes model adapters and bridges on a PCI bus. The properties in PCIController and its subclasses are defined in the various PCI Specifications published by the PCI SIG.None TRANSLATABLE= true

Local Class Properties

NameData TypeQualifiers
NameData TypeValueScopeFlavors
CacheLineSizeuint8
DescriptionstringSpecifies the system cache line size in doubleword increments (e.g., a 486-based system would store the value 04h, indicating a cache line size of four doublewords.None TRANSLATABLE= true
UnitsstringDoubleWordsNone TRANSLATABLE= true
ClassCodeuint8
DescriptionstringRegister of 8 bits that identifies the basic function of the PCI device. This is only the upper byte (offset 0Bh) of the 3 byte ClassCode field. Note that the property's ValueMap array specifies the decimal representation of this information.None TRANSLATABLE= true
ValueMapstring0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 255None None
ValuesstringPre 2.0, Mass Storage, Network, Display, Multimedia, Memory, Bridge, Simple Communications, Base Peripheral, Input, Docking Station, Processor, Serial Bus, Wireless, Intelligent I/O, Satellite Communication, Encryption/Decryption, Data Acquisition and Signal Processing, OtherNone TRANSLATABLE= true
CommandRegisteruint16
DescriptionstringCurrent contents of the register that provides basic control over the device's ability to respond to, and/or perform PCI accesses.None TRANSLATABLE= true
DeviceSelectTiminguint16
DescriptionstringThe slowest device select timing for a target device.None TRANSLATABLE= true
ValuesstringUnknown, Other, Fast, Medium, Slow, ReservedNone TRANSLATABLE= true
ExpansionROMBaseAddressuint32
DescriptionstringDoubleword Expansion ROM base memory address.None TRANSLATABLE= true
UnitsstringDoubleWordsNone TRANSLATABLE= true
InterruptPinuint16
DescriptionstringDefines the PCI interrupt request pin (INTA# to INTD#) to which a PCI functional device is connected.None TRANSLATABLE= true
ValuesstringNone, INTA#, INTB#, INTC#, INTD#, UnknownNone TRANSLATABLE= true
LatencyTimeruint8
DescriptionstringDefines the minimum amount of time, in PCI clock cycles, that the bus master can retain ownership of the bus.None TRANSLATABLE= true
UnitsstringPCI clock cyclesNone TRANSLATABLE= true
SelfTestEnabledboolean
DescriptionstringReports if the PCI device can perform the self test function. Returns bit 7 of the BIST register as a boolean.None TRANSLATABLE= true

Inherited Properties

NameData TypeClass Origin
Availabilityuint16CIM_LogicalDevice
CaptionstringCIM_ManagedElement
CreationClassNamestringCIM_LogicalDevice
DescriptionstringCIM_ManagedElement
DeviceIDstringCIM_LogicalDevice
ErrorClearedbooleanCIM_LogicalDevice
ErrorDescriptionstringCIM_LogicalDevice
InstallDatedatetimeCIM_ManagedSystemElement
LastErrorCodeuint32CIM_LogicalDevice
MaxNumberControlleduint32CIM_Controller
MaxQuiesceTimeuint64CIM_LogicalDevice
NamestringCIM_ManagedSystemElement
PowerManagementSupportedbooleanCIM_LogicalDevice
PowerOnHoursuint64CIM_LogicalDevice
ProtocolDescriptionstringCIM_Controller
ProtocolSupporteduint16CIM_Controller
StatusstringCIM_ManagedSystemElement
StatusInfouint16CIM_LogicalDevice
SystemCreationClassNamestringCIM_LogicalDevice
SystemNamestringCIM_LogicalDevice
TimeOfLastResetdatetimeCIM_Controller
TotalPowerOnHoursuint64CIM_LogicalDevice