Name | Data Type | Qualifiers |
Name | Data Type | Value | Scope | Flavors |
BridgeType | uint16 |
Description | string | The type of bridge. Except for "Host" (value=0), the type of bridge is PCI to <value>. For type "Host", the device is a Host to PCI bridge. | None | TRANSLATABLE= true |
ValueMap | string | 0, 1, 2, 3, 4, 5, 6, 7, 8, 128 | None | None |
Values | string | Host, ISA, EISA, Micro Channel, PCI, PCMCIA, NuBus, CardBus, RACEway, Other | None | TRANSLATABLE= true |
IOBase | uint8 |
Description | string | Base address of I/O addresses supported by the bus. The upper four bits of this property specify the address bits, AD[15::12], of the I/O address. The remaining 12 bits of the I/O address are assumed to be 0. | None | TRANSLATABLE= true |
IOBaseUpper16 | uint16 |
Description | string | Upper 16 bits of the supported I/O base address when 32-bit I/O addressing is used. The lower 16 bits are assumed to be 0. | None | TRANSLATABLE= true |
IOLimit | uint8 |
Description | string | End address of the I/O addresses supported by the bus. The upper four bits of this property specify the address bits, AD[15::12], of the I/O address. The remaining 12 bits of the I/O address are assumed to be all 1's. | None | TRANSLATABLE= true |
IOLimitUpper16 | uint16 |
Description | string | Upper 16 bits of the supported I/O end address when 32-bit I/O addressing is used. The lower 16 bits are assumed to be all 1's. | None | TRANSLATABLE= true |
MemoryBase | uint16 |
Description | string | Base address of the memory supported by the bus. The upper twelve bits of this property specify the address bits, AD[31::20], of a 32-bit memory address. The remaining 20 bits of the address are assumed to be 0. | None | TRANSLATABLE= true |
MemoryLimit | uint16 |
Description | string | End address of the memory supported by the bus. The upper twelve bits of this property specify the address bits, AD[31::20], of a 32-bit memory address. The remaining 20 bits of the address are assumed to be all 1's. | None | TRANSLATABLE= true |
PrefetchBaseUpper32 | uint32 |
Description | string | Upper 32 bits of the supported prefetch base address when 64-bit addressing is used. The lower 32 bits are assumed to be 0. | None | TRANSLATABLE= true |
PrefetchLimitUpper32 | uint32 |
Description | string | Upper 32 bits of the supported prefetch end address when 64-bit addressing is used. The lower 32 bits are assumed to be all 1's. | None | TRANSLATABLE= true |
PrefetchMemoryBase | uint16 |
Description | string | Base address of the memory that can be prefetched by the bus. The upper twelve bits of this property specify the address bits, AD[31::20], of a 32-bit memory address. The remaining 20 bits of the address are assumed to be 0. | None | TRANSLATABLE= true |
PrefetchMemoryLimit | uint16 |
Description | string | End address of the memory that can be prefetched by the bus. The upper twelve bits of this property specify the address bits, AD[31::20], of a 32-bit memory address. The remaining 20 bits of the address are assumed to be all 1's. | None | TRANSLATABLE= true |
PrimaryBusNumber | uint8 |
Description | string | The number of the PCI bus segment to which the primary interface of the bridge is connected. | None | TRANSLATABLE= true |
SecondaryBusDeviceSelectTiming | uint16 |
Description | string | The slowest device select timing for a target device on the secondary bus. | None | TRANSLATABLE= true |
Values | string | Unknown, Other, Fast, Medium, Slow, Reserved | None | TRANSLATABLE= true |
SecondaryLatencyTimer | uint8 |
Description | string | The timeslice for the secondary interface when the bridge is acting as an initiator. A zero value indicates no requirement. | None | TRANSLATABLE= true |
Units | string | PCI clock cycles | None | TRANSLATABLE= true |
SecondaryStatusRegister | uint16 |
Description | string | The contents of the Bridge's SecondaryStatusRegister. For more information on the contents of this register, refer to the PCI-to-PCI Bridge Architecture Specification. | None | TRANSLATABLE= true |
SecondayBusNumber | uint8 |
Description | string | The number of the PCI bus segment to which the secondary interface of the bridge is connected. | None | TRANSLATABLE= true |
SubordinateBusNumber | uint8 |
Description | string | The number of the highest numbered bus that exists behind the bridge. | None | TRANSLATABLE= true |